diff --git a/Makefile b/Makefile index 9553af0..d738a02 100644 --- a/Makefile +++ b/Makefile @@ -1,6 +1,6 @@ .PHONY : clean debug -OBJS = card.o evga-icx.o evga-card.o icx3.o board-sensors.o zen3-rapl.o +OBJS = blackwell-sensors.o card.o evga-icx.o evga-card.o gddr6.o icx3.o board-sensors.o zen3-rapl.o LDLIBS = -li2c -lm CFLAGS = -MD -I/usr/local/cuda/targets/x86_64-linux/include/ @@ -16,12 +16,6 @@ CFLAGS += -DUSE_DCGM -I/usr/include/datacenter-gpu-manager-4/ OBJS += nvidia-dcgm.o endif -ifdef USE_LIBPCI -LDLIBS += -lpci -CFLAGS += -DUSE_LIBPCI -OBJS += gddr6.o -endif - evga-icx : $(OBJS) debug : CFLAGS += -g -Og diff --git a/blackwell-sensors.c b/blackwell-sensors.c new file mode 100644 index 0000000..755ef89 --- /dev/null +++ b/blackwell-sensors.c @@ -0,0 +1,192 @@ +#include +#include +#include +#include +#include + +#include "blackwell-sensors.h" + +/* Number of die sensors, 4 for Blackwell */ +#define BLACKWELL_NUM_DIE_SENSORS 4 +/* Memory spacing between DRAM FBPA blocks */ +#define BLACKWELL_FBPA_STRIDE 0x4000 +/* Maximum count of FBPA blocks, technically up to 18 but no consumer card has more than 8 */ +#define BLACKWELL_MAX_NUM_FBPA 9 + +/* Yeah I know this is duplicated */ +#define HEADER_COLOR_START "\x1b[36m" +#define HEADER_COLOR_END "\x1b[39m" + +static float read_temp_sensor(void *addr); +static int read_dram_temp_sensor(void *addr); + +struct blackwell_card_info { + char *card_name; + unsigned short vendor_id; + unsigned short device_id; + int die_temp_offset[BLACKWELL_NUM_DIE_SENSORS]; + int sys_temp_offset; + int dram_temp_offset_start; + int clamshell; /* If the card has dual-side ram, if not then half the DRAM temps are repeated */ +}; + +static struct blackwell_card_info blackwell_card_list[] = +{ + {"NVIDIA RTX PRO 6000 Blackwell Workstation Edition", NVIDIA_VEN, NVIDIA_RTXPRO6000_WORKSTATION_DEV, {0xAD0A90, 0xAD0A94, 0xAD0A98, 0xAD0A9C}, 0xAD06EC, 0x9024C0, true} +}; + + +/* Search all i2c device files for ones are on a PCI device of a supported GPU, + and respond with the correct iCX3 version information */ +int find_blackwell_gpus(struct card_info *infos, int num_gpus, int max_gpus) +{ + char pci_devices_path[PATH_MAX]; + char device_path[PATH_MAX]; + char dev_file[PATH_MAX]; + char pci_path[PATH_MAX]; + char *pci_addr; + + DIR *dir; + struct dirent *ent; + + unsigned short pci_vendor, pci_device = 0; + + /* Start looking for PCI */ + strcpy(pci_devices_path, "/sys/bus/pci/devices/"); + dir = opendir(pci_devices_path); + + /* make sure we can open the PCI device */ + if(dir == NULL) + return num_gpus; + + /* loop over all PCI devices */ + while((ent = readdir(dir)) != NULL) + { + strcpy(device_path, pci_devices_path); + strcat(device_path, ent->d_name); + + pci_vendor = read_pci_id(device_path, "/vendor"); + pci_device = read_pci_id(device_path, "/device"); + + /* See if it's a supported Blackwell card*/ + for (int i = 0; i < (sizeof(blackwell_card_list) / sizeof(struct blackwell_card_info)); i++) { + + if (pci_vendor == blackwell_card_list[i].vendor_id && + pci_device == blackwell_card_list[i].device_id) { + + infos[num_gpus].card_name = blackwell_card_list[i].card_name; + infos[num_gpus].pci_id = strdup(ent->d_name); + infos[num_gpus].pci_dev_path = strdup(device_path); + infos[num_gpus].pci_device_id = pci_device; + infos[num_gpus].i2c_dev_path = NULL; + infos[num_gpus].i2c_fd = -1; + + mmap_bar0(&infos[num_gpus]); + num_gpus++; + break; + } + } + + if (num_gpus == max_gpus) + break; + } + + return num_gpus; +} + +void print_blackwell_info(int compact, int overwrite, struct card_info *gpu) +{ + if (gpu->bar0_mmap == NULL) + return; + + for (int i = 0; i < (sizeof(blackwell_card_list) / sizeof(struct blackwell_card_info)); i++) { + if (!compact) + printf("%s @ %s\n", gpu->card_name, gpu->pci_id); + float temp; + + if (blackwell_card_list[i].device_id == gpu->pci_device_id) { + /* Print die sensors */ + if (compact) + printf("%sDIE%s", HEADER_COLOR_START, HEADER_COLOR_END); + for (int die_sens_num = 0; die_sens_num < BLACKWELL_NUM_DIE_SENSORS; die_sens_num++) { + temp = read_temp_sensor(gpu->bar0_mmap + blackwell_card_list[i].die_temp_offset[die_sens_num]); + if (compact) + printf(" %3.0f", temp); + else + printf("Die %d: %+.1f°C\n", die_sens_num, temp); + } + + /* Sys temp */ + temp = read_temp_sensor(gpu->bar0_mmap + blackwell_card_list[i].sys_temp_offset); + if (compact) + printf(" %sSYS%s %3.0f", HEADER_COLOR_START, temp, HEADER_COLOR_END); + else + printf("System: %+.1f°C\n", temp); + + /* DRAM temps */ + int dram_num = 0; + int num_channels = blackwell_card_list[i].clamshell ? 4 : 2; + int dram_max = 0; + int dram_min = 120; + int dram_total = 0.0; + for (int fbpa_num = 0; fbpa_num < BLACKWELL_MAX_NUM_FBPA; fbpa_num++) { + for (int chan_num = 0; chan_num < num_channels; chan_num++) { + temp = read_dram_temp_sensor(gpu->bar0_mmap + + blackwell_card_list[i].dram_temp_offset_start + + BLACKWELL_FBPA_STRIDE * fbpa_num + + 0x4 * chan_num + + 2); + + if (temp == 0.0) + break; + + dram_max = (temp > dram_max) ? temp : dram_max; + dram_min = (temp < dram_min) ? temp : dram_min; + dram_total += temp; + + if (!compact) + printf("DRAM %i: %+.0f°C\n", dram_num, temp); + dram_num++; + } + } + if (compact) { + printf(" %sDRAM HI%s %3.0f %sAVG%s %5.1f %sLO%s %3.0f", + HEADER_COLOR_START, + HEADER_COLOR_END, + (float)dram_max, + HEADER_COLOR_START, + HEADER_COLOR_END, + (float)dram_total/dram_num, + HEADER_COLOR_START, + HEADER_COLOR_END, + (float)dram_min); + } else { + printf("DRAM average: %+.1f°C\n", (float)dram_total/dram_num); + printf("DRAM min: %+.0f°C\n", (float)dram_min); + printf("DRAM max: %+.0f°C\n", (float)dram_max); + } + if (overwrite) + printf("\x1b[1G"); + else + printf("\n"); + + return; + } + } +} + +float read_temp_sensor(void *addr) +{ + return (*(uint16_t *)addr) / (float)0x100; +} + +int read_dram_temp_sensor(void *addr) +{ + uint16_t raw = *(uint16_t *)addr; + if (raw == 0xBADF) + return 0.0; + + int code = (raw >> 8) & 0xFF; + if (code > 80) code = 80; + return (code > 19) ? (code - 20) * 2 : -(40 - code * 2); +} \ No newline at end of file diff --git a/blackwell-sensors.h b/blackwell-sensors.h new file mode 100644 index 0000000..b71c22c --- /dev/null +++ b/blackwell-sensors.h @@ -0,0 +1,9 @@ +#ifndef BLACKWELL_SENSORS_H +#define BLACKWELL_SENSORS_H + +#include "card.h" + +#endif + +int find_blackwell_gpus(struct card_info *infos, int num_gpus, int max_gpus); +void print_blackwell_info(int compact, int overwrite, struct card_info *gpu); \ No newline at end of file diff --git a/card.c b/card.c index 47ed1ba..bab2c35 100644 --- a/card.c +++ b/card.c @@ -2,6 +2,10 @@ #include #include #include +#include +#include +#include +#include #include "card.h" @@ -29,6 +33,7 @@ unsigned short read_pci_id(char *device_path, char *field) return (unsigned short)strtoul(buf, NULL, 16); } +/* Read a PCI ID from the name of an Nvidia i2c device */ char *read_nvidia_pci_address(char *device_path) { char file_path[PATH_MAX]; @@ -55,3 +60,37 @@ char *read_nvidia_pci_address(char *device_path) return ret; } + +/* Open an mmap to the BAR0 of a PCI device using its /sys/bus/pci device files */ +void mmap_bar0(struct card_info *card) +{ + char resource_path[PATH_MAX]; + snprintf(resource_path, sizeof(resource_path), "%s/resource0", card->pci_dev_path); + + /* Open FD on the resource file */ + int fd = open(resource_path, O_RDONLY); + if (fd == -1) { + printf("Unable to open %s\n", resource_path); + card->bar0_mmap = NULL; + return; + } + + /* Figure out the size of BAR0 fomr the size of the resource file */ + struct stat st; + if (fstat(fd, &st) == -1) { + printf("Unable to stat %s\n", resource_path); + close(fd); + card->bar0_mmap = NULL; + return; + } + + /* mmap the bar0 resource file */ + card->bar0_mmap = mmap(0, st.st_size, PROT_READ, MAP_SHARED, fd, 0); + if (card->bar0_mmap == MAP_FAILED) { + printf("Unable to mmap %s\n", resource_path); + card->bar0_mmap = NULL; + } + + /* mmap stays open after the FD has been closed */ + close(fd); +} \ No newline at end of file diff --git a/card.h b/card.h index 79d3e0b..484c868 100644 --- a/card.h +++ b/card.h @@ -1,3 +1,26 @@ +#define NVIDIA_VEN 0x10DE + +#define NVIDIA_RTX3060_DEV 0x2503 +#define NVIDIA_RTX3060_GA104_DEV 0x2487 +#define NVIDIA_RTX3060_GA106_DEV 0x2503 +#define NVIDIA_RTX3060_LHR_DEV 0x2504 +#define NVIDIA_RTX3060TI_DEV 0x2486 +#define NVIDIA_RTX3060TI_GDDR6X_DEV 0x24C9 +#define NVIDIA_RTX3060TI_LHR_DEV 0x2489 +#define NVIDIA_RTX3060TI_V1_LHR_DEV 0x2414 +#define NVIDIA_RTX3070_DEV 0x2484 +#define NVIDIA_RTX3070_LHR_DEV 0x2488 +#define NVIDIA_RTX3070TI_DEV 0x2482 +#define NVIDIA_RTX3070TI_GA102_DEV 0x2207 +#define NVIDIA_RTX3080_DEV 0x2206 +#define NVIDIA_RTX3080_LHR_DEV 0x2216 +#define NVIDIA_RTX3080_12G_LHR_DEV 0x220A +#define NVIDIA_RTX3080TI_DEV 0x2208 +#define NVIDIA_RTX3090_DEV 0x2204 +#define NVIDIA_RTX3090TI_DEV 0x2203 + +#define NVIDIA_RTXPRO6000_WORKSTATION_DEV 0x2BB1 + struct card_info { char *card_name; /* The 'nice' name of the card */ char *pci_id; /* PCI bus address in domain:bus:device.function format. May be shortened (e.g. c:00.0) */ @@ -10,13 +33,6 @@ struct card_info { void *nvml_device; /* Pointer to nvmlDevice_t for use in NVML calls */ }; -struct gpu_pci_info { - char *card_name; - unsigned short vendor_id; - unsigned short device_id; - unsigned short subvendor_id; - unsigned short subdevice_id; -}; - unsigned short read_pci_id(char *device_path, char *field); -char *read_nvidia_pci_address(char *device_path); \ No newline at end of file +char *read_nvidia_pci_address(char *device_path); +void mmap_bar0(struct card_info *card); diff --git a/evga-card.c b/evga-card.c index 0055d89..1a49531 100644 --- a/evga-card.c +++ b/evga-card.c @@ -6,6 +6,77 @@ #include "evga-card.h" #include "icx3.h" +struct gpu_pci_info { + char *card_name; + unsigned short vendor_id; + unsigned short device_id; + unsigned short subvendor_id; + unsigned short subdevice_id; +}; + +static struct gpu_pci_info evga_pci_ids[] = +{ + {"EVGA GeForce RTX 3060 Ti FTW3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3060TI_DEV, EVGA_SUB_VEN, EVGA_RTX3060TI_FTW3_GAMING_SUB_DEV }, + {"EVGA GeForce RTX 3060 Ti FTW3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3060TI_DEV, EVGA_SUB_VEN, EVGA_RTX3060TI_FTW3_ULTRA_SUB_DEV }, + {"EVGA GeForce RTX 3060 Ti FTW3 Ultra LHR" , NVIDIA_VEN, NVIDIA_RTX3060TI_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3060TI_FTW3_ULTRA_KL_SUB_DEV }, + {"EVGA GeForce RTX 3070 Black Gaming" , NVIDIA_VEN, NVIDIA_RTX3070_DEV, EVGA_SUB_VEN, EVGA_RTX3070_XC3_BLACK_SUB_DEV }, + {"EVGA GeForce RTX 3070 XC3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3070_DEV, EVGA_SUB_VEN, EVGA_RTX3070_XC3_GAMING_SUB_DEV }, + {"EVGA GeForce RTX 3070 XC3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3070_DEV, EVGA_SUB_VEN, EVGA_RTX3070_XC3_ULTRA_SUB_DEV }, + {"EVGA GeForce RTX 3070 XC3 Ultra LHR" , NVIDIA_VEN, NVIDIA_RTX3070_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3070_XC3_ULTRA_LHR_SUB_DEV }, + {"EVGA GeForce RTX 3070 XC3 Ultra Gaming" , NVIDIA_VEN, NVIDIA_RTX3070_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3070_XC3_ULTRA_GAMING_LHR_SUB_DEV }, + {"EVGA GeForce RTX 3070 FTW3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3070_DEV, EVGA_SUB_VEN, EVGA_RTX3070_FTW3_ULTRA_SUB_DEV }, + {"EVGA GeForce RTX 3070 FTW3 Ultra LHR" , NVIDIA_VEN, NVIDIA_RTX3070_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3070_FTW3_ULTRA_LHR_SUB_DEV }, + {"EVGA GeForce RTX 3070 Ti XC3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3070TI_DEV, EVGA_SUB_VEN, EVGA_RTX3070TI_XC3_GAMING_SUB_DEV }, + {"EVGA GeForce RTX 3070 Ti XC3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3070TI_DEV, EVGA_SUB_VEN, EVGA_RTX3070TI_XC3_ULTRA_SUB_DEV }, + {"EVGA GeForce RTX 3070 Ti XC3 Ultra v2" , NVIDIA_VEN, NVIDIA_RTX3070TI_DEV, EVGA_SUB_VEN, EVGA_RTX3070TI_XC3_ULTRA_V2_SUB_DEV }, + {"EVGA GeForce RTX 3070 Ti FTW3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3070TI_DEV, EVGA_SUB_VEN, EVGA_RTX3070TI_FTW3_ULTRA_SUB_DEV }, + {"EVGA GeForce RTX 3070 Ti FTW3 Ultra v2" , NVIDIA_VEN, NVIDIA_RTX3070TI_DEV, EVGA_SUB_VEN, EVGA_RTX3070TI_FTW3_ULTRA_V2_SUB_DEV }, + {"EVGA GeForce RTX 3080 XC3 Black" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_BLACK_SUB_DEV }, + {"EVGA GeForce RTX 3080 XC3 Black LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_BLACK_LHR_SUB_DEV }, + {"EVGA GeForce RTX 3080 XC3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_GAMING_SUB_DEV }, + {"EVGA GeForce RTX 3080 XC3 Gaming LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_GAMING_LHR_SUB_DEV }, + {"EVGA GeForce RTX 3080 XC3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_ULTRA_SUB_DEV }, + {"EVGA GeForce RTX 3080 XC3 Ultra LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_ULTRA_LHR_SUB_DEV }, + {"EVGA GeForce RTX 3080 XC3 Ultra Hybrid" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_ULTRA_HYBRID_SUB_DEV }, + {"EVGA GeForce RTX 3080 XC3 Ultra Hybrid LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_ULTRA_HYBRID_LHR_SUB_DEV }, + {"EVGA GeForce RTX 3080 XC3 Ultra Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_ULTRA_HC_SUB_DEV }, + {"EVGA GeForce RTX 3080 FTW3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_GAMING_SUB_DEV }, + {"EVGA GeForce RTX 3080 FTW3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_SUB_DEV }, + {"EVGA GeForce RTX 3080 FTW3 Ultra v2 LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_LHR_V2_SUB_DEV }, + {"EVGA GeForce RTX 3080 FTW3 Ultra LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_LHR_SUB_DEV }, + {"EVGA GeForce RTX 3080 FTW3 Ultra Hybrid" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_HYBRID_SUB_DEV }, + {"EVGA GeForce RTX 3080 FTW3 Ultra Hybrid LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_HYBRID_LHR_SUB_DEV }, + {"EVGA GeForce RTX 3080 FTW3 Ultra Hybrid Gaming LHR" , NVIDIA_VEN, NVIDIA_RTX3080_12G_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_HYBRID_GAMING_SUB_DEV }, + {"EVGA GeForce RTX 3080 FTW3 Ultra Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_HC_SUB_DEV }, + {"EVGA GeForce RTX 3080 XC3 Ultra 12G" , NVIDIA_VEN, NVIDIA_RTX3080_12G_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_12G_XC3_ULTRA_SUB_DEV }, + {"EVGA GeForce RTX 3080 FTW3 Ultra 12GB" , NVIDIA_VEN, NVIDIA_RTX3080_12G_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_12G_FTW3_ULTRA_SUB_DEV }, + {"EVGA GeForce RTX 3080 FTW3 Ultra Hydro Copper 12G" , NVIDIA_VEN, NVIDIA_RTX3080_12G_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_12G_FTW3_ULTRA_HC_SUB_DEV }, + {"EVGA GeForce RTX 3080 Ti XC3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_XC3_GAMING_SUB_DEV }, + {"EVGA GeForce RTX 3080 Ti XC3 Ultra Gaming" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_XC3_ULTRA_GAMING_SUB_DEV }, + {"EVGA GeForce RTX 3080 Ti XC3 Gaming Hybrid" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_XC3_GAMING_HYBRID_SUB_DEV }, + {"EVGA GeForce RTX 3080 Ti XC3 Gaming Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_XC3_GAMING_HC_SUB_DEV }, + {"EVGA GeForce RTX 3080 Ti FTW3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_FTW3_ULTRA_SUB_DEV }, + {"EVGA GeForce RTX 3080 Ti FTW3 Ultra Hybrid" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_FTW3_ULTRA_HYBRID_SUB_DEV }, + {"EVGA GeForce RTX 3080 Ti FTW3 Ultra Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_FTW3_ULTRA_HC_SUB_DEV }, + {"EVGA GeForce RTX 3090 XC3 Black" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_XC3_BLACK_SUB_DEV }, + {"EVGA GeForce RTX 3090 XC3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_XC3_GAMING_SUB_DEV }, + {"EVGA GeForce RTX 3090 XC3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_XC3_ULTRA_SUB_DEV }, + {"EVGA GeForce RTX 3090 XC3 Ultra Hybrid" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_XC3_ULTRA_HYBRID_SUB_DEV }, + {"EVGA GeForce RTX 3090 XC3 Ultra Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_XC3_ULTRA_HC_SUB_DEV }, + {"EVGA GeForce RTX 3090 FTW3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_FTW3_ULTRA_SUB_DEV }, + {"EVGA GeForce RTX 3090 FTW3 Ultra v2" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_FTW3_ULTRA_V2_SUB_DEV }, + {"EVGA GeForce RTX 3090 FTW3 Ultra v3" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_FTW3_ULTRA_V3_SUB_DEV }, + {"EVGA GeForce RTX 3090 FTW3 Ultra Hybrid" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_FTW3_ULTRA_HYBRID_SUB_DEV }, + {"EVGA GeForce RTX 3090 FTW3 Ultra Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_FTW3_ULTRA_HC_SUB_DEV }, + {"EVGA GeForce RTX 3090 K|NGP|N Hybrid" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_KINGPIN_HYBRID_SUB_DEV }, + {"EVGA GeForce RTX 3090 K|NGP|N Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_KINGPIN_HC_SUB_DEV }, + {"EVGA GeForce RTX 3090 Ti FTW3 Black Gaming" , NVIDIA_VEN, NVIDIA_RTX3090TI_DEV, EVGA_SUB_VEN, EVGA_RTX3090TI_FTW3_BLACK_SUB_DEV }, + {"EVGA GeForce RTX 3090 Ti FTW3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3090TI_DEV, EVGA_SUB_VEN, EVGA_RTX3090TI_FTW3_GAMING_SUB_DEV }, + {"EVGA GeForce RTX 3090 Ti FTW3 Ultra Gaming" , NVIDIA_VEN, NVIDIA_RTX3090TI_DEV, EVGA_SUB_VEN, EVGA_RTX3090TI_FTW3_ULTRA_GAMING_SUB_DEV } +}; + + + /* Search all i2c device files for ones are on a PCI device of a supported GPU, and respond with the correct iCX3 version information */ int find_evga_gpu_i2cs(struct card_info *infos, int max_gpus, int i2c_bus) @@ -46,7 +117,6 @@ int find_evga_gpu_i2cs(struct card_info *infos, int max_gpus, int i2c_bus) continue; } - strcpy(device_path, i2c_devices_path); strcat(device_path, ent->d_name); @@ -84,6 +154,7 @@ int find_evga_gpu_i2cs(struct card_info *infos, int max_gpus, int i2c_bus) infos[num_gpus].pci_dev_path = strdup(pci_path); infos[num_gpus].pci_device_id = pci_device; infos[num_gpus].i2c_dev_path = strdup(dev_file); + mmap_bar0(&infos[num_gpus]); num_gpus++; break; } @@ -92,7 +163,6 @@ int find_evga_gpu_i2cs(struct card_info *infos, int max_gpus, int i2c_bus) if (num_gpus == max_gpus) break; - } return num_gpus; diff --git a/evga-card.h b/evga-card.h index d8240b1..9ff4d14 100644 --- a/evga-card.h +++ b/evga-card.h @@ -3,27 +3,6 @@ #include "card.h" -#define NVIDIA_VEN 0x10DE - -#define NVIDIA_RTX3060_DEV 0x2503 -#define NVIDIA_RTX3060_GA104_DEV 0x2487 -#define NVIDIA_RTX3060_GA106_DEV 0x2503 -#define NVIDIA_RTX3060_LHR_DEV 0x2504 -#define NVIDIA_RTX3060TI_DEV 0x2486 -#define NVIDIA_RTX3060TI_GDDR6X_DEV 0x24C9 -#define NVIDIA_RTX3060TI_LHR_DEV 0x2489 -#define NVIDIA_RTX3060TI_V1_LHR_DEV 0x2414 -#define NVIDIA_RTX3070_DEV 0x2484 -#define NVIDIA_RTX3070_LHR_DEV 0x2488 -#define NVIDIA_RTX3070TI_DEV 0x2482 -#define NVIDIA_RTX3070TI_GA102_DEV 0x2207 -#define NVIDIA_RTX3080_DEV 0x2206 -#define NVIDIA_RTX3080_LHR_DEV 0x2216 -#define NVIDIA_RTX3080_12G_LHR_DEV 0x220A -#define NVIDIA_RTX3080TI_DEV 0x2208 -#define NVIDIA_RTX3090_DEV 0x2204 -#define NVIDIA_RTX3090TI_DEV 0x2203 - #define EVGA_SUB_VEN 0x3842 #define EVGA_RTX3060TI_FTW3_GAMING_SUB_DEV 0x3665 @@ -85,67 +64,6 @@ #define EVGA_RTX3090TI_FTW3_GAMING_SUB_DEV 0x4983 #define EVGA_RTX3090TI_FTW3_ULTRA_GAMING_SUB_DEV 0x4985 -static struct gpu_pci_info evga_pci_ids[] = -{ - {"EVGA GeForce RTX 3060 Ti FTW3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3060TI_DEV, EVGA_SUB_VEN, EVGA_RTX3060TI_FTW3_GAMING_SUB_DEV }, - {"EVGA GeForce RTX 3060 Ti FTW3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3060TI_DEV, EVGA_SUB_VEN, EVGA_RTX3060TI_FTW3_ULTRA_SUB_DEV }, - {"EVGA GeForce RTX 3060 Ti FTW3 Ultra LHR" , NVIDIA_VEN, NVIDIA_RTX3060TI_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3060TI_FTW3_ULTRA_KL_SUB_DEV }, - {"EVGA GeForce RTX 3070 Black Gaming" , NVIDIA_VEN, NVIDIA_RTX3070_DEV, EVGA_SUB_VEN, EVGA_RTX3070_XC3_BLACK_SUB_DEV }, - {"EVGA GeForce RTX 3070 XC3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3070_DEV, EVGA_SUB_VEN, EVGA_RTX3070_XC3_GAMING_SUB_DEV }, - {"EVGA GeForce RTX 3070 XC3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3070_DEV, EVGA_SUB_VEN, EVGA_RTX3070_XC3_ULTRA_SUB_DEV }, - {"EVGA GeForce RTX 3070 XC3 Ultra LHR" , NVIDIA_VEN, NVIDIA_RTX3070_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3070_XC3_ULTRA_LHR_SUB_DEV }, - {"EVGA GeForce RTX 3070 XC3 Ultra Gaming" , NVIDIA_VEN, NVIDIA_RTX3070_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3070_XC3_ULTRA_GAMING_LHR_SUB_DEV }, - {"EVGA GeForce RTX 3070 FTW3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3070_DEV, EVGA_SUB_VEN, EVGA_RTX3070_FTW3_ULTRA_SUB_DEV }, - {"EVGA GeForce RTX 3070 FTW3 Ultra LHR" , NVIDIA_VEN, NVIDIA_RTX3070_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3070_FTW3_ULTRA_LHR_SUB_DEV }, - {"EVGA GeForce RTX 3070 Ti XC3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3070TI_DEV, EVGA_SUB_VEN, EVGA_RTX3070TI_XC3_GAMING_SUB_DEV }, - {"EVGA GeForce RTX 3070 Ti XC3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3070TI_DEV, EVGA_SUB_VEN, EVGA_RTX3070TI_XC3_ULTRA_SUB_DEV }, - {"EVGA GeForce RTX 3070 Ti XC3 Ultra v2" , NVIDIA_VEN, NVIDIA_RTX3070TI_DEV, EVGA_SUB_VEN, EVGA_RTX3070TI_XC3_ULTRA_V2_SUB_DEV }, - {"EVGA GeForce RTX 3070 Ti FTW3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3070TI_DEV, EVGA_SUB_VEN, EVGA_RTX3070TI_FTW3_ULTRA_SUB_DEV }, - {"EVGA GeForce RTX 3070 Ti FTW3 Ultra v2" , NVIDIA_VEN, NVIDIA_RTX3070TI_DEV, EVGA_SUB_VEN, EVGA_RTX3070TI_FTW3_ULTRA_V2_SUB_DEV }, - {"EVGA GeForce RTX 3080 XC3 Black" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_BLACK_SUB_DEV }, - {"EVGA GeForce RTX 3080 XC3 Black LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_BLACK_LHR_SUB_DEV }, - {"EVGA GeForce RTX 3080 XC3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_GAMING_SUB_DEV }, - {"EVGA GeForce RTX 3080 XC3 Gaming LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_GAMING_LHR_SUB_DEV }, - {"EVGA GeForce RTX 3080 XC3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_ULTRA_SUB_DEV }, - {"EVGA GeForce RTX 3080 XC3 Ultra LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_ULTRA_LHR_SUB_DEV }, - {"EVGA GeForce RTX 3080 XC3 Ultra Hybrid" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_ULTRA_HYBRID_SUB_DEV }, - {"EVGA GeForce RTX 3080 XC3 Ultra Hybrid LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_ULTRA_HYBRID_LHR_SUB_DEV }, - {"EVGA GeForce RTX 3080 XC3 Ultra Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_XC3_ULTRA_HC_SUB_DEV }, - {"EVGA GeForce RTX 3080 FTW3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_GAMING_SUB_DEV }, - {"EVGA GeForce RTX 3080 FTW3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_SUB_DEV }, - {"EVGA GeForce RTX 3080 FTW3 Ultra v2 LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_LHR_V2_SUB_DEV }, - {"EVGA GeForce RTX 3080 FTW3 Ultra LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_LHR_SUB_DEV }, - {"EVGA GeForce RTX 3080 FTW3 Ultra Hybrid" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_HYBRID_SUB_DEV }, - {"EVGA GeForce RTX 3080 FTW3 Ultra Hybrid LHR" , NVIDIA_VEN, NVIDIA_RTX3080_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_HYBRID_LHR_SUB_DEV }, - {"EVGA GeForce RTX 3080 FTW3 Ultra Hybrid Gaming LHR" , NVIDIA_VEN, NVIDIA_RTX3080_12G_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_HYBRID_GAMING_SUB_DEV }, - {"EVGA GeForce RTX 3080 FTW3 Ultra Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3080_DEV, EVGA_SUB_VEN, EVGA_RTX3080_FTW3_ULTRA_HC_SUB_DEV }, - {"EVGA GeForce RTX 3080 XC3 Ultra 12G" , NVIDIA_VEN, NVIDIA_RTX3080_12G_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_12G_XC3_ULTRA_SUB_DEV }, - {"EVGA GeForce RTX 3080 FTW3 Ultra 12GB" , NVIDIA_VEN, NVIDIA_RTX3080_12G_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_12G_FTW3_ULTRA_SUB_DEV }, - {"EVGA GeForce RTX 3080 FTW3 Ultra Hydro Copper 12G" , NVIDIA_VEN, NVIDIA_RTX3080_12G_LHR_DEV, EVGA_SUB_VEN, EVGA_RTX3080_12G_FTW3_ULTRA_HC_SUB_DEV }, - {"EVGA GeForce RTX 3080 Ti XC3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_XC3_GAMING_SUB_DEV }, - {"EVGA GeForce RTX 3080 Ti XC3 Ultra Gaming" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_XC3_ULTRA_GAMING_SUB_DEV }, - {"EVGA GeForce RTX 3080 Ti XC3 Gaming Hybrid" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_XC3_GAMING_HYBRID_SUB_DEV }, - {"EVGA GeForce RTX 3080 Ti XC3 Gaming Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_XC3_GAMING_HC_SUB_DEV }, - {"EVGA GeForce RTX 3080 Ti FTW3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_FTW3_ULTRA_SUB_DEV }, - {"EVGA GeForce RTX 3080 Ti FTW3 Ultra Hybrid" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_FTW3_ULTRA_HYBRID_SUB_DEV }, - {"EVGA GeForce RTX 3080 Ti FTW3 Ultra Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3080TI_DEV, EVGA_SUB_VEN, EVGA_RTX3080TI_FTW3_ULTRA_HC_SUB_DEV }, - {"EVGA GeForce RTX 3090 XC3 Black" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_XC3_BLACK_SUB_DEV }, - {"EVGA GeForce RTX 3090 XC3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_XC3_GAMING_SUB_DEV }, - {"EVGA GeForce RTX 3090 XC3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_XC3_ULTRA_SUB_DEV }, - {"EVGA GeForce RTX 3090 XC3 Ultra Hybrid" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_XC3_ULTRA_HYBRID_SUB_DEV }, - {"EVGA GeForce RTX 3090 XC3 Ultra Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_XC3_ULTRA_HC_SUB_DEV }, - {"EVGA GeForce RTX 3090 FTW3 Ultra" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_FTW3_ULTRA_SUB_DEV }, - {"EVGA GeForce RTX 3090 FTW3 Ultra v2" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_FTW3_ULTRA_V2_SUB_DEV }, - {"EVGA GeForce RTX 3090 FTW3 Ultra v3" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_FTW3_ULTRA_V3_SUB_DEV }, - {"EVGA GeForce RTX 3090 FTW3 Ultra Hybrid" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_FTW3_ULTRA_HYBRID_SUB_DEV }, - {"EVGA GeForce RTX 3090 FTW3 Ultra Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_FTW3_ULTRA_HC_SUB_DEV }, - {"EVGA GeForce RTX 3090 K|NGP|N Hybrid" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_KINGPIN_HYBRID_SUB_DEV }, - {"EVGA GeForce RTX 3090 K|NGP|N Hydro Copper" , NVIDIA_VEN, NVIDIA_RTX3090_DEV, EVGA_SUB_VEN, EVGA_RTX3090_KINGPIN_HC_SUB_DEV }, - {"EVGA GeForce RTX 3090 Ti FTW3 Black Gaming" , NVIDIA_VEN, NVIDIA_RTX3090TI_DEV, EVGA_SUB_VEN, EVGA_RTX3090TI_FTW3_BLACK_SUB_DEV }, - {"EVGA GeForce RTX 3090 Ti FTW3 Gaming" , NVIDIA_VEN, NVIDIA_RTX3090TI_DEV, EVGA_SUB_VEN, EVGA_RTX3090TI_FTW3_GAMING_SUB_DEV }, - {"EVGA GeForce RTX 3090 Ti FTW3 Ultra Gaming" , NVIDIA_VEN, NVIDIA_RTX3090TI_DEV, EVGA_SUB_VEN, EVGA_RTX3090TI_FTW3_ULTRA_GAMING_SUB_DEV } -}; - int find_evga_gpu_i2cs(struct card_info *infos, int max_gpus, int i2c_bus); #endif diff --git a/evga-icx.c b/evga-icx.c index 314049c..e019bd3 100644 --- a/evga-icx.c +++ b/evga-icx.c @@ -13,10 +13,8 @@ #include "nvidia-dcgm.h" #endif -#ifdef USE_LIBPCI - #include "gddr6.h" -#endif - +#include "blackwell-sensors.h" +#include "gddr6.h" #include "icx3.h" #include "evga-card.h" #include "board-sensors.h" @@ -150,6 +148,8 @@ int main (int argc, char **argv) /* Scan for supported GPUs */ gpu_count = find_evga_gpu_i2cs(gpus, MAX_GPUS, i2c_bus); + /* Scan for supported Blackwell GPUs */ + gpu_count = find_blackwell_gpus(gpus, gpu_count, MAX_GPUS); /* Check for no GPUs found or other errors */ if (gpu_count == -1) { @@ -202,12 +202,6 @@ int main (int argc, char **argv) init_dcgm(); #endif - /* PCI init for VRAM/hotspot temps */ -#ifdef USE_LIBPCI - for (int i = 0; i < gpu_count; i++) - init_gddr6(&gpus[i]); -#endif - /* print sensor info */ if (print_info) { do { @@ -216,21 +210,25 @@ int main (int argc, char **argv) if (print_board_sensors) print_board_info(board_sensors, board_sensor_count); - -#ifdef USE_DCGM - print_dcgm(compact, overwrite); -#endif if (gpu_num == -1) { /* No GPU specified on command line, loop over all supported GPUs */ for (int i = 0; i < gpu_count; i++){ if (i > 0) printf("\n"); - print_gpu_info(i, &gpus[i]); + if (gpus[i].i2c_dev_path == NULL) { + print_blackwell_info(compact, overwrite, &gpus[i]); + } else { + print_gpu_info(i, &gpus[i]); + } } } else if (gpu_num <= gpu_count - 1) { print_gpu_info(gpu_num, &gpus[gpu_num]); } + +#ifdef USE_DCGM + print_dcgm(compact, overwrite); +#endif if (!overwrite) printf("\n"); /* Print line break at the end for continuous output */ @@ -344,16 +342,12 @@ void print_gpu_info(int gpu_num, struct card_info *gpu) for (int i = 0; i < ICX3_NUM_TEMP_SENSORS; i++) { if (i > 0 && strncmp(icx3_temp_sensor_names[i], icx3_temp_sensor_names[i-1], 3)) printf("%s %.3s%s", header_start, icx3_temp_sensor_names[i], header_end); -#ifdef USE_LIBPCI if (strncmp(icx3_temp_sensor_names[i], "MEM1", 4) == 0) printf(" %3.0f", get_vram_temp(gpu)); /* Print the VRAM temp before the rest of the memory sensors */ -#endif printf(" %3.0f", icx_temp_sensors[i]); } -#ifdef USE_LIBPCI printf("%s HOT%s %3.0f", header_start, header_end, get_hotspot_temp(gpu)); -#endif printf("°C "); @@ -378,18 +372,14 @@ void print_gpu_info(int gpu_num, struct card_info *gpu) float icx_temp_sensors[ICX3_NUM_TEMP_SENSORS] = {}; get_temp_sensors(icx_temp_sensors, gpu); for (int i = 0; i < ICX3_NUM_TEMP_SENSORS; i++) { -#ifdef USE_LIBPCI if (strncmp(icx3_temp_sensor_names[i], "MEM1", 4) == 0) printf("VRAM: +%.0f°C\n", get_vram_temp(gpu)); /* Print the VRAM temp before the rest of the memory sensors */ -#endif printf("%s: %+.1f°C\n", icx3_temp_sensor_names[i], icx_temp_sensors[i]); } -#ifdef USE_LIBPCI printf("HotSpot: +%.0f°C\n", get_hotspot_temp(gpu)); -#endif #ifdef USE_NVML printf("Mem util: %d%%\n", get_nvml_mem_util(gpu)); diff --git a/gddr6.c b/gddr6.c index cc18024..96ef749 100644 --- a/gddr6.c +++ b/gddr6.c @@ -1,104 +1,48 @@ #include #include -#include -#include -#include -#include - -#define PG_SZ sysconf(_SC_PAGE_SIZE) #include "gddr6.h" -void init_gddr6(struct card_info *card) +static struct device_offset device_offset_info[] = { - /* Parse the address of the card to get the PCI info */ - char pci_address[] = "00000000:00:00.0"; - int len = strlen(card->pci_id); - strcpy(&pci_address[sizeof(pci_address) - len - 1], card->pci_id); - - int domain = 0; - int bus = 0; - int dev = 0; - int func = 0; - - sscanf(pci_address, "%x:%x:%x.%x", &domain, &bus, &dev, &func); - - struct pci_access *pacc = NULL; - struct pci_dev *pci_dev = NULL; - - pacc = pci_alloc(); - pci_init(pacc); - - pci_dev = pci_get_dev(pacc, domain, bus, dev, func); - - pci_fill_info(pci_dev, PCI_FILL_IDENT | PCI_FILL_BASES | PCI_FILL_CLASS); - - card->bar0 = (pci_dev->base_addr[0] & 0xFFFFFFFF); - - pci_cleanup(pacc); - - /* Open our memory mappings */ - card->vram_addr = NULL; - card->hotspot_addr = NULL; - - int fd; - if ((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1) - { - printf("Can't read memory for VRAM and Hotspot temperatures. If you are root, enable kernel parameter iomem=relaxed\n"); - return; - } - - unsigned int phys_addr, base_offset; - void *map_base; - - for (int i = 0; i < sizeof(device_offset_info) / sizeof(struct device_offset); i++) { - if (card->pci_device_id == device_offset_info[i].device_id){ - /* Map for VRAM */ - phys_addr = (card->bar0 + device_offset_info[i].vram_offset); - base_offset = phys_addr & ~(PG_SZ-1); - map_base = mmap(0, PG_SZ, PROT_READ, MAP_SHARED, fd, base_offset); - if(map_base == (void *) -1) - printf("Can't map memory for VRAM temperature. If you are root, enable kernel parameter iomem=relaxed\n"); - else - card->vram_addr = (void *) map_base + (phys_addr - base_offset); - - - /* Map for hotspot */ - phys_addr = (card->bar0 + device_offset_info[i].hotspot_offset); - base_offset = phys_addr & ~(PG_SZ-1); - map_base = mmap(0, PG_SZ, PROT_READ, MAP_SHARED, fd, base_offset); - if(map_base == (void *) -1) - printf("Can't map memory for Hotspot temperature. If you are root, enable kernel parameter iomem=relaxed\n"); - else - card->hotspot_addr = (void *) map_base + (phys_addr - base_offset); - } - } - - close(fd); -} + {.device_id = NVIDIA_RTX3090TI_DEV, .vram_offset = 0x0000E2A8, .hotspot_offset = 0x0002046c}, /* RTX 3090 Ti */ + {.device_id = NVIDIA_RTX3090_DEV, .vram_offset = 0x0000E2A8, .hotspot_offset = 0x0002046c}, /* RTX 3090 */ + {.device_id = NVIDIA_RTX3080TI_DEV, .vram_offset = 0x0000E2A8, .hotspot_offset = 0x0002046c}, /* RTX 3080 Ti */ + {.device_id = NVIDIA_RTX3080_12G_LHR_DEV, .vram_offset = 0x0000E2A8, .hotspot_offset = 0x0002046c}, /* RTX 3080 12G LHR */ + {.device_id = NVIDIA_RTX3080_LHR_DEV, .vram_offset = 0x0000E2A8, .hotspot_offset = 0x0002046c}, /* RTX 3080 LHR */ + {.device_id = NVIDIA_RTX3080_DEV, .vram_offset = 0x0000E2A8, .hotspot_offset = 0x0002046c}, /* RTX 3080 */ + {.device_id = NVIDIA_RTX3070TI_GA102_DEV, .vram_offset = 0x0000EE50, .hotspot_offset = 0x0002046c}, /* RTX 3070 Ti GA102 TODO:check */ + {.device_id = NVIDIA_RTX3070TI_DEV, .vram_offset = 0x0000EE50, .hotspot_offset = 0x0002046c}, /* RTX 3070 Ti TODO:check */ + {.device_id = NVIDIA_RTX3070_LHR_DEV, .vram_offset = 0x0000EE50, .hotspot_offset = 0x0002046c}, /* RTX 3070 LHR */ + {.device_id = NVIDIA_RTX3070_DEV, .vram_offset = 0x0000EE50, .hotspot_offset = 0x0002046c}, /* RTX 3070 */ +}; float get_vram_temp(struct card_info *card) { - float temp = 0.0; - - if(card->vram_addr == NULL) + if (card->bar0_mmap == NULL) return 0.0; - int read_result = *((unsigned int *) card->vram_addr); - temp = ((read_result & 0x00000fff) / 0x20); + for (int i = 0; i < sizeof(device_offset_info) / sizeof(struct device_offset); i++) { + if (card->pci_device_id == device_offset_info[i].device_id) { + unsigned int read_result = *((unsigned int *)((char *)card->bar0_mmap + device_offset_info[i].vram_offset)); + return (float)((read_result & 0x00000fff) / 0x20); + } + } - return temp; + return 0.0; } float get_hotspot_temp(struct card_info *card) { - float temp = 0.0; - - if(card->hotspot_addr == NULL) + if (card->bar0_mmap == NULL) return 0.0; - int read_result = *((unsigned int *) card->hotspot_addr); - temp = (read_result >> 8) & 0xff; + for (int i = 0; i < sizeof(device_offset_info) / sizeof(struct device_offset); i++) { + if (card->pci_device_id == device_offset_info[i].device_id) { + unsigned int read_result = *((unsigned int *)((char *)card->bar0_mmap + device_offset_info[i].hotspot_offset)); + return (float)((read_result >> 8) & 0xff); + } + } - return temp; + return 0.0; } diff --git a/gddr6.h b/gddr6.h index 6662e3d..1460a8d 100644 --- a/gddr6.h +++ b/gddr6.h @@ -6,20 +6,5 @@ struct device_offset { int hotspot_offset; }; -static struct device_offset device_offset_info[] = -{ - {.device_id = NVIDIA_RTX3090TI_DEV, .vram_offset = 0x0000E2A8, .hotspot_offset = 0x0002046c}, /* RTX 3090 Ti */ - {.device_id = NVIDIA_RTX3090_DEV, .vram_offset = 0x0000E2A8, .hotspot_offset = 0x0002046c}, /* RTX 3090 */ - {.device_id = NVIDIA_RTX3080TI_DEV, .vram_offset = 0x0000E2A8, .hotspot_offset = 0x0002046c}, /* RTX 3080 Ti */ - {.device_id = NVIDIA_RTX3080_12G_LHR_DEV, .vram_offset = 0x0000E2A8, .hotspot_offset = 0x0002046c}, /* RTX 3080 12G LHR */ - {.device_id = NVIDIA_RTX3080_LHR_DEV, .vram_offset = 0x0000E2A8, .hotspot_offset = 0x0002046c}, /* RTX 3080 LHR */ - {.device_id = NVIDIA_RTX3080_DEV, .vram_offset = 0x0000E2A8, .hotspot_offset = 0x0002046c}, /* RTX 3080 */ - {.device_id = NVIDIA_RTX3070TI_GA102_DEV, .vram_offset = 0x0000EE50, .hotspot_offset = 0x0002046c}, /* RTX 3070 Ti GA102 TODO:check */ - {.device_id = NVIDIA_RTX3070TI_DEV, .vram_offset = 0x0000EE50, .hotspot_offset = 0x0002046c}, /* RTX 3070 Ti TODO:check */ - {.device_id = NVIDIA_RTX3070_LHR_DEV, .vram_offset = 0x0000EE50, .hotspot_offset = 0x0002046c}, /* RTX 3070 LHR */ - {.device_id = NVIDIA_RTX3070_DEV, .vram_offset = 0x0000EE50, .hotspot_offset = 0x0002046c}, /* RTX 3070 */ -}; - -void init_gddr6(struct card_info *card); float get_vram_temp(struct card_info *card); float get_hotspot_temp(struct card_info *card); diff --git a/nvidia-dcgm.c b/nvidia-dcgm.c index 4946b57..24fe29e 100644 --- a/nvidia-dcgm.c +++ b/nvidia-dcgm.c @@ -105,6 +105,8 @@ void print_dcgm(int compact, int overwrite) if (overwrite) printf("\x1b[1G"); + else + printf("\n"); } int update_field_values(unsigned int gpu_id, dcgmFieldValue_v1 *values, int num_values, void *userdata)