#include <dcgm_agent.h>
#include <dcgm_structs.h>

#include "evga-card.h"

struct metric_reading {
	unsigned short field_id;
	char *short_name;
	char *long_name;
	double last_reading;
};

static struct metric_reading metric_readings[] =
{
	{DCGM_FI_PROF_GR_ENGINE_ACTIVE,			"GFX",		"Graphics Engine Activity"},
	{DCGM_FI_PROF_SM_ACTIVE,				"SM ACT",	"SM Activity"},
	{DCGM_FI_PROF_SM_OCCUPANCY,				"OCC",		"SM Occupancy"},
	{DCGM_FI_PROF_PIPE_FP16_ACTIVE,			"FP16",		"FP16 Engine Activity"},
	{DCGM_FI_PROF_PIPE_FP32_ACTIVE,			"FP32",		"FP32 Engine Activity"},
	{DCGM_FI_PROF_PIPE_FP64_ACTIVE,			"FP64",		"FP64 Engine Activity"},
	{DCGM_FI_PROF_PIPE_INT_ACTIVE,			"INT",		"Integer Activity"},
	{DCGM_FI_PROF_PIPE_TENSOR_ACTIVE,		"TENS",		"Tensor Activity"},
	{DCGM_FI_PROF_PIPE_TENSOR_HMMA_ACTIVE,	"HMMA",		"Half Precision Tensor"},
	{DCGM_FI_PROF_PIPE_TENSOR_IMMA_ACTIVE,	"IMMA",		"Integer Tensor"},
	{DCGM_FI_PROF_PIPE_TENSOR_DFMA_ACTIVE,	"DFMA",		"Double Precision Tensor"},
	{DCGM_FI_PROF_DRAM_ACTIVE,				"DRAM",		"Memory BW Utilization"}
};

struct clock_reason {
	unsigned long long mask;
	char *short_name;
	char *long_name;
};

static struct clock_reason clock_reason_names[] = 
{
	{DCGM_CLOCKS_EVENT_REASON_GPU_IDLE,			"Idle", 	"GPU idle"},
	{DCGM_CLOCKS_EVENT_REASON_CLOCKS_SETTING,	"AppClk",	"Application clocks"},
	{DCGM_CLOCKS_EVENT_REASON_SW_POWER_CAP,		"Pwr",		"Power cap"},
	{DCGM_CLOCKS_EVENT_REASON_HW_SLOWDOWN,		"HWSlow",	"Hardware slowdown"},
	{DCGM_CLOCKS_EVENT_REASON_SYNC_BOOST,		"Sync",		"Sync boost"},
	{DCGM_CLOCKS_EVENT_REASON_SW_THERMAL,		"SWTherm",	"Software thermal"},
	{DCGM_CLOCKS_EVENT_REASON_HW_THERMAL,		"HWTherm",	"Hardware thermal"},
	{DCGM_CLOCKS_EVENT_REASON_HW_POWER_BRAKE,	"HWPower",	"Hardware power brake"},
	{DCGM_CLOCKS_EVENT_REASON_DISPLAY_CLOCKS,	"DispClk",	"Display clock"}
};

void init_dcgm();
void shutdown_dcgm();
void print_dcgm(int compact, int overwrite);
int update_field_values(unsigned int gpu_id, dcgmFieldValue_v1 *values, int num_values, void *userdata);